Add check of begin/end labels for genblock

Signed-off-by: Kamil Rakoczy <krakoczy@antmicro.com>

1 files changed, 26 insertions, 0 deletions

diff --git a/tests/verilog/block_labels.ys b/tests/verilog/block_labels.ys
new file mode 100644
index 000000000..e76bcf771
--- /dev/null
+++ b/tests/verilog/block_labels.ys
@@ -0,0 +1,26 @@
+read_verilog <<EOT
+module foo;
+
+	genvar a = 0;
+	for (a = 0; a < 10; a++) begin : a
+	end : a
+endmodule
+EOT
+read_verilog <<EOT
+module foo2;
+
+	genvar a = 0;
+	for (a = 0; a < 10; a++) begin : a
+	end
+endmodule
+EOT
+
+logger -expect error "Begin label \(a\) and end label \(b\) don't match\." 1
+read_verilog <<EOT
+module foo3;
+
+	genvar a = 0;
+	for (a = 0; a < 10; a++) begin : a
+	end : b
+endmodule
+EOT