diff options
author | David Shah <dave@ds0.me> | 2019-09-20 18:40:35 +0100 |
---|---|---|
committer | David Shah <dave@ds0.me> | 2019-10-03 09:54:45 +0100 |
commit | 9b9d24f15b1b91b64b97e12bd05693f4539762d9 (patch) | |
tree | 35b4a40148814c9e826e1a07b49b2d3fca721ee7 /tests/svtypes/typedef_memory.sv | |
parent | 5501d9090aaf2d508b2f082f8453effe7fce08df (diff) | |
download | yosys-9b9d24f15b1b91b64b97e12bd05693f4539762d9.tar.gz yosys-9b9d24f15b1b91b64b97e12bd05693f4539762d9.tar.bz2 yosys-9b9d24f15b1b91b64b97e12bd05693f4539762d9.zip |
sv: Improve tests
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'tests/svtypes/typedef_memory.sv')
-rw-r--r-- | tests/svtypes/typedef_memory.sv | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/svtypes/typedef_memory.sv b/tests/svtypes/typedef_memory.sv index c848c3287..37e63c1d0 100644 --- a/tests/svtypes/typedef_memory.sv +++ b/tests/svtypes/typedef_memory.sv @@ -7,4 +7,4 @@ module top(input [3:0] addr, wdata, input clk, wen, output reg [3:0] rdata); if (wen) mem[addr] <= wdata; rdata <= mem[addr]; end -endmodule
\ No newline at end of file +endmodule |