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| author | Clifford Wolf <clifford@clifford.at> | 2018-06-11 18:10:12 +0200 |
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| committer | Clifford Wolf <clifford@clifford.at> | 2018-06-11 18:12:42 +0200 |
| commit | 83631555dd5d57e2a3d3b7175f77baf0ad67ccd9 (patch) | |
| tree | 43a5560b461d10e98be8303d3d541a30d0f66add /tests/sva | |
| parent | 270c1814b5bcab0f0b54f05b4856380b57617a69 (diff) | |
| download | yosys-83631555dd5d57e2a3d3b7175f77baf0ad67ccd9.tar.gz yosys-83631555dd5d57e2a3d3b7175f77baf0ad67ccd9.tar.bz2 yosys-83631555dd5d57e2a3d3b7175f77baf0ad67ccd9.zip | |
Fix ice40_opt for cases where a port is connected to a signal with width != 1
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'tests/sva')
0 files changed, 0 insertions, 0 deletions