diff options
| author | Clifford Wolf <clifford@clifford.at> | 2017-07-27 11:42:05 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2017-07-27 11:42:05 +0200 |
| commit | b24f73775983eb7a30d50f608ccc8702e54c57c3 (patch) | |
| tree | 1ac774a5810f821740f6c721e348a34b8c9408ac /tests/sva/basic03.sv | |
| parent | 90d8329f642e710e8d4ce358cfb9543b85bcd822 (diff) | |
| download | yosys-b24f73775983eb7a30d50f608ccc8702e54c57c3.tar.gz yosys-b24f73775983eb7a30d50f608ccc8702e54c57c3.tar.bz2 yosys-b24f73775983eb7a30d50f608ccc8702e54c57c3.zip | |
Improve SVA tests, add Makefile and scripts
Diffstat (limited to 'tests/sva/basic03.sv')
| -rw-r--r-- | tests/sva/basic03.sv | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/tests/sva/basic03.sv b/tests/sva/basic03.sv index a15f3f3a4..8018de4ca 100644 --- a/tests/sva/basic03.sv +++ b/tests/sva/basic03.sv @@ -4,7 +4,9 @@ module top (input logic clk, input logic selA, selB, QA, QB, output logic Q); if (selB) Q <= QB; end - check_selA: assert property ( @(posedge clk) selA|=> Q == $past(QA) ); - check_selB: assert property ( @(posedge clk) selB|=> Q == $past(QB) ); - assume_not_11: assume property ( @(posedge clk) !(selA& selB) ); + check_selA: assert property ( @(posedge clk) selA |=> Q == $past(QA) ); + check_selB: assert property ( @(posedge clk) selB |=> Q == $past(QB) ); +`ifndef FAIL + assume_not_11: assume property ( @(posedge clk) !(selA & selB) ); +`endif endmodule |