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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-06-11 12:19:21 +0200 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2021-06-11 12:06:35 +0100 |
| commit | 438bcc68c0859057e4d3f521d1c865d2a9d90e15 (patch) | |
| tree | dd7cc1aa00bf16895c40b4b8aed5456b4cc0f4f9 /tests/opt/bug2824.ys | |
| parent | 6a6d049f1cb6a96eb2af83441a0fb156efbd9cc3 (diff) | |
| download | yosys-438bcc68c0859057e4d3f521d1c865d2a9d90e15.tar.gz yosys-438bcc68c0859057e4d3f521d1c865d2a9d90e15.tar.bz2 yosys-438bcc68c0859057e4d3f521d1c865d2a9d90e15.zip | |
Add regression test for #2824.
Diffstat (limited to 'tests/opt/bug2824.ys')
| -rw-r--r-- | tests/opt/bug2824.ys | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/tests/opt/bug2824.ys b/tests/opt/bug2824.ys new file mode 100644 index 000000000..9d0d1e9e5 --- /dev/null +++ b/tests/opt/bug2824.ys @@ -0,0 +1,7 @@ +read_verilog -icells << EOT +module top(input I, output O); +$pmux #(.WIDTH(1), .S_WIDTH(2)) m (.S({I, 1'b0}), .A(1'b0), .B({I, 1'b0}), .Y(O)); +endmodule +EOT + +equiv_opt -assert opt_muxtree |