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| author | Dan Ravensloft <dan.ravensloft@gmail.com> | 2020-07-26 19:28:10 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-07-27 15:39:06 +0200 |
| commit | a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21 (patch) | |
| tree | 11c29855676708a2260ad9174514b2ed450b36cf /tests/arch/intel_alm | |
| parent | 62311b7ec0fc92fd78c38dd416551d460f1647a2 (diff) | |
| download | yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.tar.gz yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.tar.bz2 yosys-a2fb84fd0c5f57b601b6a3c4cee0b409d74b5d21.zip | |
intel_alm: direct M10K instantiation
This reverts commit a3a90f6377f251d3b6c5898eb1543f8832493bb8.
Diffstat (limited to 'tests/arch/intel_alm')
| -rw-r--r-- | tests/arch/intel_alm/blockram.ys | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/tests/arch/intel_alm/blockram.ys b/tests/arch/intel_alm/blockram.ys new file mode 100644 index 000000000..610ae1ffd --- /dev/null +++ b/tests/arch/intel_alm/blockram.ys @@ -0,0 +1,6 @@ +read_verilog ../common/blockram.v +chparam -set ADDRESS_WIDTH 10 -set DATA_WIDTH 10 sync_ram_sdp +synth_intel_alm -family cyclonev +cd sync_ram_sdp +select -assert-count 1 t:MISTRAL_M10K +select -assert-none t:MISTRAL_M10K %% t:* %D |