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authorMiodrag Milanovic <mmicko@gmail.com>2019-10-18 12:33:35 +0200
committerMiodrag Milanovic <mmicko@gmail.com>2019-10-18 12:33:35 +0200
commit12383f37b2e1d72784e01db0431efc8882f25430 (patch)
tree5bd01531406aedd9ee9f1ceaaab18374a8235ec2 /tests/arch/ecp5
parent477702b8c91bb7780ac80b25c8ad659cd40b445d (diff)
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Common memory test now shared
Diffstat (limited to 'tests/arch/ecp5')
-rw-r--r--tests/arch/ecp5/memory.v21
-rw-r--r--tests/arch/ecp5/memory.ys2
2 files changed, 1 insertions, 22 deletions
diff --git a/tests/arch/ecp5/memory.v b/tests/arch/ecp5/memory.v
deleted file mode 100644
index cb7753f7b..000000000
--- a/tests/arch/ecp5/memory.v
+++ /dev/null
@@ -1,21 +0,0 @@
-module top
-(
- input [7:0] data_a,
- input [6:1] addr_a,
- input we_a, clk,
- output reg [7:0] q_a
-);
- // Declare the RAM variable
- reg [7:0] ram[63:0];
-
- // Port A
- always @ (posedge clk)
- begin
- if (we_a)
- begin
- ram[addr_a] <= data_a;
- q_a <= data_a;
- end
- q_a <= ram[addr_a];
- end
-endmodule
diff --git a/tests/arch/ecp5/memory.ys b/tests/arch/ecp5/memory.ys
index 9b475f122..c82b7b405 100644
--- a/tests/arch/ecp5/memory.ys
+++ b/tests/arch/ecp5/memory.ys
@@ -1,4 +1,4 @@
-read_verilog memory.v
+read_verilog ../common/memory.v
hierarchy -top top
proc
memory -nomap