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| author | gatecat <gatecat@ds0.me> | 2022-01-19 16:04:55 +0000 |
|---|---|---|
| committer | gatecat <gatecat@ds0.me> | 2022-01-19 18:14:24 +0000 |
| commit | f699c4ba5828bc5352068fa536e48b8046dc44d9 (patch) | |
| tree | 41bdd0251f3cc10e8900d2ef06f5cfae1862559a /techlibs | |
| parent | 36482680d5b51d31e39cd8df2f513215463fc498 (diff) | |
| download | yosys-f699c4ba5828bc5352068fa536e48b8046dc44d9.tar.gz yosys-f699c4ba5828bc5352068fa536e48b8046dc44d9.tar.bz2 yosys-f699c4ba5828bc5352068fa536e48b8046dc44d9.zip | |
nexus: Fix BB sim model
Signed-off-by: gatecat <gatecat@ds0.me>
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/nexus/cells_sim.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/nexus/cells_sim.v b/techlibs/nexus/cells_sim.v index 1e876a210..d1c8bf0d7 100644 --- a/techlibs/nexus/cells_sim.v +++ b/techlibs/nexus/cells_sim.v @@ -54,8 +54,8 @@ endmodule // Bidirectional IO buffer module BB(input T, I, output O, (* iopad_external_pin *) inout B); - assign B = T ? 1'bz : O; - assign I = B; + assign B = T ? 1'bz : I; + assign O = B; endmodule // Input buffer |