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author | Eddie Hung <eddie@fpgeh.com> | 2019-12-03 14:49:10 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-03 14:49:10 -0800 |
commit | ed3f35917531e5757699261aae92135f59205bf2 (patch) | |
tree | ceb2bca931ea9e2e155d9a26f2f7c3f289bc69c5 /techlibs | |
parent | 1ea9ce0ad7d2a44b88353be3a44eedf306ac786e (diff) | |
download | yosys-ed3f35917531e5757699261aae92135f59205bf2.tar.gz yosys-ed3f35917531e5757699261aae92135f59205bf2.tar.bz2 yosys-ed3f35917531e5757699261aae92135f59205bf2.zip |
$__ICE40_CARRY_WRAPPER to use _TECHMAP_REPLACE_ for SB_CARRY to preserve
name and attr
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/ice40/cells_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ice40/cells_map.v b/techlibs/ice40/cells_map.v index 662423f0a..efd763ef6 100644 --- a/techlibs/ice40/cells_map.v +++ b/techlibs/ice40/cells_map.v @@ -65,7 +65,7 @@ endmodule `ifndef NO_ADDER module \$__ICE40_CARRY_WRAPPER (output CO, O, input A, B, CI, I0, I3); parameter LUT = 0; - SB_CARRY carry ( + SB_CARRY _TECHMAP_REPLACE_ ( .I0(A), .I1(B), .CI(CI), |