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| author | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 09:10:34 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-27 09:10:34 -0800 |
| commit | df8dc6d1fb1f9fc47a8356b5f0bf572a1ea140d2 (patch) | |
| tree | 509c52e7403ad102cd3eaa3b3e5d05a7205b2a18 /techlibs | |
| parent | cd2af66099ed3d4ecc06069b395a577e03113389 (diff) | |
| download | yosys-df8dc6d1fb1f9fc47a8356b5f0bf572a1ea140d2.tar.gz yosys-df8dc6d1fb1f9fc47a8356b5f0bf572a1ea140d2.tar.bz2 yosys-df8dc6d1fb1f9fc47a8356b5f0bf572a1ea140d2.zip | |
ean call after abc{,9}
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 6e8ced0df..5bc55387b 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -538,6 +538,7 @@ struct SynthXilinxPass : public ScriptPass else abc9_opts += " -lut +/xilinx/abc9_xc7.lut"; run("abc9" + abc9_opts); + run("clean"); run("clkpart -unpart clkpart"); } else { @@ -545,8 +546,8 @@ struct SynthXilinxPass : public ScriptPass run("abc -luts 2:2,3,6:5" + string(retime ? " -dff" : "")); else run("abc -luts 2:2,3,6:5,10,20" + string(retime ? " -dff" : "")); + run("clean"); } - run("clean"); // This shregmap call infers fixed length shift registers after abc // has performed any necessary retiming |