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| author | Clifford Wolf <clifford@clifford.at> | 2018-12-19 19:51:10 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-12-19 19:51:10 +0100 |
| commit | c98d44ac1264af679aa6eef6da86eb609a5e0ae9 (patch) | |
| tree | aab707d91a4159c17ca64a3becfdf616607950b2 /techlibs | |
| parent | 4d84a456dcbf5dea7e689a05cb031a394cec447a (diff) | |
| parent | 3993ba71f7eb663fba73c0da4e35183b076168dd (diff) | |
| download | yosys-c98d44ac1264af679aa6eef6da86eb609a5e0ae9.tar.gz yosys-c98d44ac1264af679aa6eef6da86eb609a5e0ae9.tar.bz2 yosys-c98d44ac1264af679aa6eef6da86eb609a5e0ae9.zip | |
Merge pull request #753 from Icenowy/anlogic-makefile-fix
anlogic: fix Makefile.inc
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/anlogic/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/techlibs/anlogic/Makefile.inc b/techlibs/anlogic/Makefile.inc index 59be83fd0..f37b5e7e9 100644 --- a/techlibs/anlogic/Makefile.inc +++ b/techlibs/anlogic/Makefile.inc @@ -5,5 +5,6 @@ OBJS += techlibs/anlogic/anlogic_eqn.o $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v)) +$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams.txt)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams_map.v)) |