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author | Eddie Hung <eddie@fpgeh.com> | 2020-02-13 09:56:00 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
commit | ac24a23e31f2da76f8b976cd89b9ec6fadf15374 (patch) | |
tree | 9d3f4f9c36e55aa476ef0126901147ae45880d4d /techlibs | |
parent | 7317521c6fa897c90328ac127cb0cf98de0bb7dd (diff) | |
download | yosys-ac24a23e31f2da76f8b976cd89b9ec6fadf15374.tar.gz yosys-ac24a23e31f2da76f8b976cd89b9ec6fadf15374.tar.bz2 yosys-ac24a23e31f2da76f8b976cd89b9ec6fadf15374.zip |
Create +/abc9_model.v for $__ABC9_{DELAY,FF_}
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/common/Makefile.inc | 1 | ||||
-rw-r--r-- | techlibs/common/abc9_model.v | 10 |
2 files changed, 11 insertions, 0 deletions
diff --git a/techlibs/common/Makefile.inc b/techlibs/common/Makefile.inc index 42f1068ad..d5e69a241 100644 --- a/techlibs/common/Makefile.inc +++ b/techlibs/common/Makefile.inc @@ -29,3 +29,4 @@ $(eval $(call add_share_file,share,techlibs/common/gate2lut.v)) $(eval $(call add_share_file,share,techlibs/common/cmp2lut.v)) $(eval $(call add_share_file,share,techlibs/common/cells.lib)) $(eval $(call add_share_file,share,techlibs/common/mul2dsp.v)) +$(eval $(call add_share_file,share,techlibs/common/abc9_model.v)) diff --git a/techlibs/common/abc9_model.v b/techlibs/common/abc9_model.v new file mode 100644 index 000000000..c0c5dc2fd --- /dev/null +++ b/techlibs/common/abc9_model.v @@ -0,0 +1,10 @@ +module \$__ABC9_FF_ (input D, output Q); +endmodule + +(* abc9_box *) +module \$__ABC9_DELAY (input I, output O); + parameter DELAY = 0; + specify + (I => O) = DELAY; + endspecify +endmodule |