diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-15 19:36:37 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-15 19:36:37 -0700 |
| commit | 9ec57b46c2f37ca9eafca8e0e919d676c74f99d8 (patch) | |
| tree | b43c8192dc09bdc61027164850636840854f5758 /techlibs | |
| parent | 0debea25a731d83449b08152c7c6158e37e63d75 (diff) | |
| download | yosys-9ec57b46c2f37ca9eafca8e0e919d676c74f99d8.tar.gz yosys-9ec57b46c2f37ca9eafca8e0e919d676c74f99d8.tar.bz2 yosys-9ec57b46c2f37ca9eafca8e0e919d676c74f99d8.zip | |
Fix spacing
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/ff_map.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/ff_map.v b/techlibs/xilinx/ff_map.v index bfd4c6998..bd36c78fc 100644 --- a/techlibs/xilinx/ff_map.v +++ b/techlibs/xilinx/ff_map.v @@ -27,7 +27,7 @@ module \$_DFF_P_ (input D, C, output Q); `ifndef _ABC FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .CE(1'b1), .R(1'b0)); `else - wire Q_next; + wire Q_next; \$__ABC_FDRE #(.INIT(|0)) _TECHMAP_REPLACE_ (.D(D), .Q(Q_next), .Q_past(Q), .C(C), .CE(1'b1), .R(1'b0)); \$__ABC_FF_ abc_dff (.D(Q_next), .Q(Q)); `endif |