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authorClifford Wolf <clifford@clifford.at>2015-04-05 09:45:14 +0200
committerClifford Wolf <clifford@clifford.at>2015-04-05 09:45:14 +0200
commit706631225e9ef0d2954c4bef51aaa2817e0f5e86 (patch)
tree41ed96a4f75f44b6b7e0502c00c7b8a3275926b7 /techlibs
parentc52a4cdeede6904f9b0d91a61a3fbeaade71a46a (diff)
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Added $_MUX4_, $_MUX8_, and $_MUX16_ cell types
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/common/simcells.v29
1 files changed, 29 insertions, 0 deletions
diff --git a/techlibs/common/simcells.v b/techlibs/common/simcells.v
index eb62d7830..d85cf5adc 100644
--- a/techlibs/common/simcells.v
+++ b/techlibs/common/simcells.v
@@ -79,6 +79,35 @@ output Y;
assign Y = S ? B : A;
endmodule
+module \$_MUX4_ (A, B, C, D, S, T, Y);
+input A, B, C, D, S, T;
+output Y;
+assign Y = T ? (S ? D : C) :
+ (S ? B : A);
+endmodule
+
+module \$_MUX8_ (A, B, C, D, E, F, G, H, S, T, U, Y);
+input A, B, C, D, E, F, G, H, S, T, U;
+output Y;
+assign Y = U ? T ? (S ? H : G) :
+ (S ? F : E) :
+ T ? (S ? D : C) :
+ (S ? B : A);
+endmodule
+
+module \$_MUX16_ (A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V, Y);
+input A, B, C, D, E, F, G, H, I, J, K, L, M, N, O, P, S, T, U, V;
+output Y;
+assign Y = V ? U ? T ? (S ? P : O) :
+ (S ? N : M) :
+ T ? (S ? L : K) :
+ (S ? J : I) :
+ U ? T ? (S ? H : G) :
+ (S ? F : E) :
+ T ? (S ? D : C) :
+ (S ? B : A);
+endmodule
+
module \$_AOI3_ (A, B, C, Y);
input A, B, C;
output Y;