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authorMarcin Koƛcielnicki <mwk@0x04.net>2019-12-22 20:43:39 +0100
committerMarcin Koƛcielnicki <mwk@0x04.net>2019-12-22 20:51:14 +0100
commit666c6128a90de588ab26c876a257ea48edfded30 (patch)
tree15ba522dc933438e1fb976a6e04757ab1a967bdd /techlibs
parentaa1adb0f1e43c353356a8283ad1f2fc007d9f54b (diff)
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xilinx_dsp: Initial DSP48A/DSP48A1 support.
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/xilinx/synth_xilinx.cc5
-rw-r--r--techlibs/xilinx/xc3sda_dsp_map.v2
-rw-r--r--techlibs/xilinx/xc6s_dsp_map.v2
3 files changed, 6 insertions, 3 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 971089b28..a19046911 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -387,7 +387,10 @@ struct SynthXilinxPass : public ScriptPass
run("opt_expr -fine");
run("wreduce");
run("select -clear");
- run("xilinx_dsp");
+ if (help_mode)
+ run("xilinx_dsp -family <family>");
+ else
+ run("xilinx_dsp -family " + family);
run("chtype -set $mul t:$__soft_mul");
}
}
diff --git a/techlibs/xilinx/xc3sda_dsp_map.v b/techlibs/xilinx/xc3sda_dsp_map.v
index 87348a173..258f90395 100644
--- a/techlibs/xilinx/xc3sda_dsp_map.v
+++ b/techlibs/xilinx/xc3sda_dsp_map.v
@@ -27,7 +27,7 @@ module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y);
.D(18'b0),
.P(P_48),
- .OPMODE(8'b0000010)
+ .OPMODE(8'b0000001)
);
assign Y = P_48;
endmodule
diff --git a/techlibs/xilinx/xc6s_dsp_map.v b/techlibs/xilinx/xc6s_dsp_map.v
index e8705723b..bdce60c14 100644
--- a/techlibs/xilinx/xc6s_dsp_map.v
+++ b/techlibs/xilinx/xc6s_dsp_map.v
@@ -27,7 +27,7 @@ module \$__MUL18X18 (input [17:0] A, input [17:0] B, output [35:0] Y);
.D(18'b0),
.P(P_48),
- .OPMODE(8'b0000010)
+ .OPMODE(8'b0000001)
);
assign Y = P_48;
endmodule