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| author | Eddie Hung <eddie@fpgeh.com> | 2019-07-17 13:26:17 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-17 13:26:17 -0700 |
| commit | 58e63feae1e950fff839c4261a787d5daf07612e (patch) | |
| tree | 04cc840bf848cc4e3f5d4418dc3733006aab18f4 /techlibs | |
| parent | 91629ee4b3aae3aa8243a659ffe1716ad5c432a2 (diff) | |
| download | yosys-58e63feae1e950fff839c4261a787d5daf07612e.tar.gz yosys-58e63feae1e950fff839c4261a787d5daf07612e.tar.bz2 yosys-58e63feae1e950fff839c4261a787d5daf07612e.zip | |
Update comment
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index bfce922db..2e2fbbd9d 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -284,12 +284,10 @@ struct SynthXilinxPass : public ScriptPass run("techmap -map +/cmp2lut.v -D LUT_WIDTH=6"); - // The actual behaviour of the Xilinx DSP is a signed 25x18 multiply - // Due to current limitations of mul2dsp, we are actually mapping as a 24x17 - // unsigned multiply with MSBs set to 1'b0 - - if (!nodsp || help_mode) + if (!nodsp || help_mode) { + // NB: Xilinx multipliers are signed only run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=25 -D DSP_A_SIGNEDONLY=1 -D DSP_B_MAXWIDTH=18 -D DSP_B_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18"); + } run("alumacc"); run("share"); |