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author | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 13:28:37 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 13:28:37 -0800 |
commit | 50b68777d3a79e283ab22388e686f615e520524d (patch) | |
tree | d522e45e42b4764eb63d8dce17644626876bc53d /techlibs | |
parent | 3012e9eebc2950b996d17a018bb2e0535badef22 (diff) | |
download | yosys-50b68777d3a79e283ab22388e686f615e520524d.tar.gz yosys-50b68777d3a79e283ab22388e686f615e520524d.tar.bz2 yosys-50b68777d3a79e283ab22388e686f615e520524d.zip |
Drive $[ABCD] explicitly
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/xilinx/abc9_map.v | 36 |
1 files changed, 21 insertions, 15 deletions
diff --git a/techlibs/xilinx/abc9_map.v b/techlibs/xilinx/abc9_map.v index e3e736e8f..cbe2a8cef 100644 --- a/techlibs/xilinx/abc9_map.v +++ b/techlibs/xilinx/abc9_map.v @@ -373,22 +373,28 @@ module DSP48E1 ( wire [47:0] $C; wire [24:0] $D; - if (PREG != 0) - assign P = $P, PCOUT = $PCOUT; - else begin - if (AREG == 0) assign $A = A; - if (BREG == 0) assign $B = B; - if (CREG == 0) assign $C = C; - if (DREG == 0) assign $D = D; + if (PREG == 0) begin + if (MREG == 0 && AREG == 0) assign $A = A; + else assign $A = 30'bx; + if (MREG == 0 && BREG == 0) assign $B = B; + else assign $B = 18'bx; + if (MREG == 0 && DREG == 0) assign $D = D; + else assign $D = 25'bx; - if (USE_MULT == "MULTIPLY" && USE_DPORT == "FALSE") - $__ABC9_DSP48E1_MULT dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); - else if (USE_MULT == "MULTIPLY" && USE_DPORT == "TRUE") - $__ABC9_DSP48E1_MULT_DPORT dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); - else if (USE_MULT == "NONE" && USE_DPORT == "FALSE") - $__ABC9_DSP48E1 dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); - else - $error("Invalid DSP48E1 configuration"); + if (CREG == 0) assign $C = C; + else assign $C = 48'bx; end + else begin + assign $A = 30'bx, $B = 18'bx, $C = 48'bx, $D = 25'bx; + end + + if (USE_MULT == "MULTIPLY" && USE_DPORT == "FALSE") + $__ABC9_DSP48E1_MULT dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); + else if (USE_MULT == "MULTIPLY" && USE_DPORT == "TRUE") + $__ABC9_DSP48E1_MULT_DPORT dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); + else if (USE_MULT == "NONE" && USE_DPORT == "FALSE") + $__ABC9_DSP48E1 dsp_comb(.$A($A), .$B($B), .$C($C), .$D($D), .$P($P), .$PCIN(PCIN), .$PCOUT($PCOUT), .P(P), .PCOUT(PCOUT)); + else + $error("Invalid DSP48E1 configuration"); endgenerate endmodule |