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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-15 16:42:27 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-15 16:42:27 -0800 |
| commit | b0605128b633f64b07107ba3a673f406e96d42ad (patch) | |
| tree | f7c106275389488b5400bace823bc4cd5c8c4001 /techlibs/xilinx | |
| parent | 168c9d5871e331341058b026cf9b4f6a99a0f759 (diff) | |
| parent | 03ce2c72bb4e8cd32df994dec04815fa5ecec6fe (diff) | |
| download | yosys-b0605128b633f64b07107ba3a673f406e96d42ad.tar.gz yosys-b0605128b633f64b07107ba3a673f406e96d42ad.tar.bz2 yosys-b0605128b633f64b07107ba3a673f406e96d42ad.zip | |
Merge remote-tracking branch 'origin/eddie/abc9_refactor' into eddie/abc9_required
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 77be8299c..3dc05cd10 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -562,7 +562,7 @@ struct SynthXilinxPass : public ScriptPass if (active_design->scratchpad.count(k)) abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str()); else - abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str()); + abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k, RTLIL::constpad.at("synth_xilinx.abc9.xc7.W")).c_str()); if (nowidelut) abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut"; else |