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| author | David Shah <dave@ds0.me> | 2019-08-08 10:05:11 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-08-08 10:05:11 +0100 |
| commit | f0f352e97164692572ce41801abd62cf5641c44f (patch) | |
| tree | c5358515c45a5e1d62e8e66823559eaf942ac500 /techlibs/xilinx/tests/.gitignore | |
| parent | ccfb4ff2a9d1cdf8205481042b0c22c39fc20e88 (diff) | |
| download | yosys-f0f352e97164692572ce41801abd62cf5641c44f.tar.gz yosys-f0f352e97164692572ce41801abd62cf5641c44f.tar.bz2 yosys-f0f352e97164692572ce41801abd62cf5641c44f.zip | |
[wip] sim model testing
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/xilinx/tests/.gitignore')
| -rw-r--r-- | techlibs/xilinx/tests/.gitignore | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/techlibs/xilinx/tests/.gitignore b/techlibs/xilinx/tests/.gitignore index 40d61ccce..ef3699bd2 100644 --- a/techlibs/xilinx/tests/.gitignore +++ b/techlibs/xilinx/tests/.gitignore @@ -4,4 +4,8 @@ bram1_[0-9]*/ bram2.log bram2_syn.v bram2_tb -dsp_work*/
\ No newline at end of file +dsp_work*/ +test_dsp_model_ref.v +test_dsp_model_uut.v +test_dsp_model +*.vcd |