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author | David Shah <dave@ds0.me> | 2019-08-08 11:39:35 +0100 |
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committer | David Shah <dave@ds0.me> | 2019-08-08 11:39:35 +0100 |
commit | b8cd4ad64ae9a45faecffc1a6b92a8219755bc60 (patch) | |
tree | 14ef43619585b04e7c86c4c698fb089ea2252181 /techlibs/xilinx/cells_sim.v | |
parent | 57aeb4cc01058c0167e5a4eda9def97b0bb1741b (diff) | |
download | yosys-b8cd4ad64ae9a45faecffc1a6b92a8219755bc60.tar.gz yosys-b8cd4ad64ae9a45faecffc1a6b92a8219755bc60.tar.bz2 yosys-b8cd4ad64ae9a45faecffc1a6b92a8219755bc60.zip |
DSP48E1 sim model: add SIMD tests
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
-rw-r--r-- | techlibs/xilinx/cells_sim.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/cells_sim.v b/techlibs/xilinx/cells_sim.v index b738d9712..8b6eaae5d 100644 --- a/techlibs/xilinx/cells_sim.v +++ b/techlibs/xilinx/cells_sim.v @@ -468,7 +468,7 @@ module DSP48E1 ( if (SEL_MASK != "MASK") $fatal(1, "Unsupported SEL_MASK value"); if (SEL_PATTERN != "PATTERN") $fatal(1, "Unsupported SEL_PATTERN value"); if (USE_PATTERN_DETECT != "NO_PATDET") $fatal(1, "Unsupported USE_PATTERN_DETECT value"); - if (USE_SIMD != "ONE48") $fatal(1, "Unsupported USE_SIMD value"); + if (USE_SIMD != "ONE48" && USE_SIMD != "TWO24" && USE_SIMD != "FOUR12") $fatal(1, "Unsupported USE_SIMD value"); if (IS_ALUMODE_INVERTED != 4'b0) $fatal(1, "Unsupported IS_ALUMODE_INVERTED value"); if (IS_CARRYIN_INVERTED != 1'b0) $fatal(1, "Unsupported IS_CARRYIN_INVERTED value"); if (IS_CLK_INVERTED != 1'b0) $fatal(1, "Unsupported IS_CLK_INVERTED value"); |