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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-25 08:43:58 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-25 08:43:58 -0700 |
| commit | ab6e8ce0f00bc9fcf38dc62ae9de26405f7b59d7 (patch) | |
| tree | 2f3ede3fb804ed9268ca759075551a09caf4fe96 /techlibs/xilinx/cells_sim.v | |
| parent | add2d415fcab64eae8819021ad1b8dd1b56e6bf2 (diff) | |
| download | yosys-ab6e8ce0f00bc9fcf38dc62ae9de26405f7b59d7.tar.gz yosys-ab6e8ce0f00bc9fcf38dc62ae9de26405f7b59d7.tar.bz2 yosys-ab6e8ce0f00bc9fcf38dc62ae9de26405f7b59d7.zip | |
Add testcase from #335, fixed by #1130
Diffstat (limited to 'techlibs/xilinx/cells_sim.v')
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