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author | Jim Lawson <ucbjrl@berkeley.edu> | 2019-05-21 12:47:55 -0700 |
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committer | Jim Lawson <ucbjrl@berkeley.edu> | 2019-05-21 12:47:55 -0700 |
commit | 489c555b41330ed9b1d69afdd8f44ef1e9a9be59 (patch) | |
tree | 64bdc5903bf099d59aa9ba9dacff03d8b7a9eda2 /techlibs/xilinx/cells_map.v | |
parent | 509f729e55458eda0ed7869ad269ec52d1956043 (diff) | |
parent | c907899422884d959632ed42c6589a0720b681e4 (diff) | |
download | yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.tar.gz yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.tar.bz2 yosys-489c555b41330ed9b1d69afdd8f44ef1e9a9be59.zip |
Merge remote-tracking branch 'upstream/master'
Diffstat (limited to 'techlibs/xilinx/cells_map.v')
-rw-r--r-- | techlibs/xilinx/cells_map.v | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/techlibs/xilinx/cells_map.v b/techlibs/xilinx/cells_map.v index b29238a12..40789ddbe 100644 --- a/techlibs/xilinx/cells_map.v +++ b/techlibs/xilinx/cells_map.v @@ -18,12 +18,14 @@ */ // Convert negative-polarity reset to positive-polarity -module \$_DFF_NN0_ (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule -module \$_DFF_PN0_ (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule - -module \$_DFF_NN1_ (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule -module \$_DFF_PN1_ (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule - +(* techmap_celltype = "$_DFF_NN0_" *) +module _90_dff_nn0_to_np0 (input D, C, R, output Q); \$_DFF_NP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN0_" *) +module _90_dff_pn0_to_pp0 (input D, C, R, output Q); \$_DFF_PP0_ _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_NN1_" *) +module _90_dff_nn1_to_np1 (input D, C, R, output Q); \$_DFF_NP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule +(* techmap_celltype = "$_DFF_PN1_" *) +module _90_dff_pn1_to_pp1 (input D, C, R, output Q); \$_DFF_PP1 _TECHMAP_REPLACE_ (.D(D), .Q(Q), .C(C), .R(~R)); endmodule module \$__SHREG_ (input C, input D, input E, output Q); parameter DEPTH = 0; |