diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-13 09:56:30 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
| commit | 8408c13405bfe561e6a6022e2730ecca18a1464a (patch) | |
| tree | a0c005bce8422388a7a8b1517ff8baf4778256e2 /techlibs/xilinx/abc9_model.v | |
| parent | ac24a23e31f2da76f8b976cd89b9ec6fadf15374 (diff) | |
| download | yosys-8408c13405bfe561e6a6022e2730ecca18a1464a.tar.gz yosys-8408c13405bfe561e6a6022e2730ecca18a1464a.tar.bz2 yosys-8408c13405bfe561e6a6022e2730ecca18a1464a.zip | |
Update xilinx for ABC9
Diffstat (limited to 'techlibs/xilinx/abc9_model.v')
| -rw-r--r-- | techlibs/xilinx/abc9_model.v | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/techlibs/xilinx/abc9_model.v b/techlibs/xilinx/abc9_model.v index 6beff30ba..8e2a05ceb 100644 --- a/techlibs/xilinx/abc9_model.v +++ b/techlibs/xilinx/abc9_model.v @@ -38,17 +38,6 @@ module \$__XILINX_MUXF78 (output O, input I0, I1, I2, I3, S0, S1); endspecify endmodule -module \$__ABC9_FF_ (input D, output Q); -endmodule - -(* abc9_box *) -module \$__ABC9_DELAY (input I, output O); - parameter DELAY = 0; - specify - (I => O) = DELAY; - endspecify -endmodule - // Box to emulate async behaviour of FDC* (* abc9_box, lib_whitebox *) module \$__ABC9_ASYNC0 (input A, S, output Y); |