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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-12 15:25:30 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
| commit | 12d70ca8fbad73f2615e711e786f8b90fa005bee (patch) | |
| tree | 6459527e212b6e0ac65d99ad023606b6afd5e9f4 /techlibs/xilinx/abc9_model.v | |
| parent | 46a89d7264f597be9ad10390fa44c22e16538548 (diff) | |
| download | yosys-12d70ca8fbad73f2615e711e786f8b90fa005bee.tar.gz yosys-12d70ca8fbad73f2615e711e786f8b90fa005bee.tar.bz2 yosys-12d70ca8fbad73f2615e711e786f8b90fa005bee.zip | |
xilinx: improve specify functionality
Diffstat (limited to 'techlibs/xilinx/abc9_model.v')
| -rw-r--r-- | techlibs/xilinx/abc9_model.v | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/techlibs/xilinx/abc9_model.v b/techlibs/xilinx/abc9_model.v index 4373191ea..6beff30ba 100644 --- a/techlibs/xilinx/abc9_model.v +++ b/techlibs/xilinx/abc9_model.v @@ -55,6 +55,7 @@ module \$__ABC9_ASYNC0 (input A, S, output Y); assign Y = S ? 1'b0 : A; specify (A => Y) = 0; + // https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L270 (S => Y) = 764; endspecify endmodule @@ -65,6 +66,7 @@ module \$__ABC9_ASYNC1 (input A, S, output Y); assign Y = S ? 1'b1 : A; specify (A => Y) = 0; + // https://github.com/SymbiFlow/prjxray-db/blob/23c8b0851f979f0799318eaca90174413a46b257/artix7/timings/slicel.sdf#L270 (S => Y) = 764; endspecify endmodule @@ -76,7 +78,7 @@ endmodule // To model the combinatorial path, such cells have to be split // into comb and seq parts, with this box modelling only the former. (* abc9_box *) -module \$__ABC9_LUT6 (input A, input [5:0] S, output Y); +module \$__ABC9_RAM6 (input A, input [5:0] S, output Y); specify (S[0] => Y) = 642; (S[1] => Y) = 631; @@ -88,7 +90,7 @@ module \$__ABC9_LUT6 (input A, input [5:0] S, output Y); endmodule // Box to emulate comb/seq behaviour of RAM128 (* abc9_box *) -module \$__ABC9_LUT7 (input A, input [6:0] S, output Y); +module \$__ABC9_RAM7 (input A, input [6:0] S, output Y); specify (S[0] => Y) = 1028; (S[1] => Y) = 1017; |