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author | Patrick Urban <patrick.urban@colognechip.com> | 2023-02-14 07:51:31 +0100 |
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committer | myrtle <gatecat@ds0.me> | 2023-02-14 12:02:41 +0100 |
commit | 4cb27b1a3ac24cb6367533ac63cfc63123fab2de (patch) | |
tree | 21d314e382eb25515d4f2f77db86cc78e077b21b /techlibs/intel | |
parent | e0bc25f1af26d6c152f72361f0fc10fc2c814357 (diff) | |
download | yosys-4cb27b1a3ac24cb6367533ac63cfc63123fab2de.tar.gz yosys-4cb27b1a3ac24cb6367533ac63cfc63123fab2de.tar.bz2 yosys-4cb27b1a3ac24cb6367533ac63cfc63123fab2de.zip |
gatemate: Ensure compatibility of LVDS ports with VHDL
Diffstat (limited to 'techlibs/intel')
0 files changed, 0 insertions, 0 deletions