diff options
| author | Clifford Wolf <clifford@clifford.at> | 2018-03-31 14:23:57 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-03-31 14:23:57 +0200 |
| commit | 93985d91b1d3e4dacf6de5563fc56f82d9123d38 (patch) | |
| tree | a9b747527eafee499022010d1f5f3a58e763faae /techlibs/intel/max10/cells_sim.v | |
| parent | 7ea8833676d8b388a57be2d0c1c7a6b1e450226a (diff) | |
| download | yosys-93985d91b1d3e4dacf6de5563fc56f82d9123d38.tar.gz yosys-93985d91b1d3e4dacf6de5563fc56f82d9123d38.tar.bz2 yosys-93985d91b1d3e4dacf6de5563fc56f82d9123d38.zip | |
Remove left-over log_ping debug commands.. oops.
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'techlibs/intel/max10/cells_sim.v')
0 files changed, 0 insertions, 0 deletions