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| author | David Shah <dave@ds0.me> | 2019-08-13 10:29:42 +0100 |
|---|---|---|
| committer | David Shah <dave@ds0.me> | 2019-08-13 10:29:42 +0100 |
| commit | edff79a25a802e5b1816608b48e3ac335ad87147 (patch) | |
| tree | 6861705224dcd8c0d3165a4316b0559b3a211ab7 /techlibs/ice40/tests/test_arith.ys | |
| parent | f890cfb63b71ae7b09e19c290ec70c358dcbe9cd (diff) | |
| download | yosys-edff79a25a802e5b1816608b48e3ac335ad87147.tar.gz yosys-edff79a25a802e5b1816608b48e3ac335ad87147.tar.bz2 yosys-edff79a25a802e5b1816608b48e3ac335ad87147.zip | |
xilinx: Rework labels for faster Verilator testing
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/ice40/tests/test_arith.ys')
0 files changed, 0 insertions, 0 deletions