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authorClifford Wolf <clifford@clifford.at>2016-04-21 23:28:37 +0200
committerClifford Wolf <clifford@clifford.at>2016-04-21 23:28:37 +0200
commit0bc95f1e049afc35bb5ea30663b0a5725dfbf584 (patch)
tree3a8641d3a9bb5794a24145ce368f3db7a3963709 /techlibs/ice40/ice40_ffssr.cc
parent1565d1af69f552b790aa43fd6be194ee59ab76f3 (diff)
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Added "yosys -D" feature
Diffstat (limited to 'techlibs/ice40/ice40_ffssr.cc')
-rw-r--r--techlibs/ice40/ice40_ffssr.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ice40/ice40_ffssr.cc b/techlibs/ice40/ice40_ffssr.cc
index 9ebc3c0d7..9a6d69df0 100644
--- a/techlibs/ice40/ice40_ffssr.cc
+++ b/techlibs/ice40/ice40_ffssr.cc
@@ -35,7 +35,7 @@ struct Ice40FfssrPass : public Pass {
}
virtual void execute(std::vector<std::string> args, RTLIL::Design *design)
{
- log_header("Executing ICE40_FFSSR pass (merge synchronous set/reset into FF cells).\n");
+ log_header(design, "Executing ICE40_FFSSR pass (merge synchronous set/reset into FF cells).\n");
size_t argidx;
for (argidx = 1; argidx < args.size(); argidx++)