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| author | Clifford Wolf <clifford@clifford.at> | 2018-11-12 09:08:49 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-11-12 09:08:49 +0100 |
| commit | 317cc9c2b7a68078fbcaf47caee66ad7cfe9fa8d (patch) | |
| tree | 64816e6a180617f6f9ffc0d2fec17000efbc2287 /techlibs/ecp5/cells_sim.v | |
| parent | 5387ccb041f4acafc96c7b3fcf8db04dddfb8ab5 (diff) | |
| parent | fae3e645a25550be1879b9320a82f1abc54a668e (diff) | |
| download | yosys-317cc9c2b7a68078fbcaf47caee66ad7cfe9fa8d.tar.gz yosys-317cc9c2b7a68078fbcaf47caee66ad7cfe9fa8d.tar.bz2 yosys-317cc9c2b7a68078fbcaf47caee66ad7cfe9fa8d.zip | |
Merge pull request #695 from daveshah1/ecp5_bb
ecp5: Adding some blackbox cells
Diffstat (limited to 'techlibs/ecp5/cells_sim.v')
| -rw-r--r-- | techlibs/ecp5/cells_sim.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ecp5/cells_sim.v b/techlibs/ecp5/cells_sim.v index 6e4b0a5ac..507ab1beb 100644 --- a/techlibs/ecp5/cells_sim.v +++ b/techlibs/ecp5/cells_sim.v @@ -257,7 +257,7 @@ assign O = I; endmodule // --------------------------------------- - +(* keep *) module TRELLIS_IO( inout B, input I, |