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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-02 08:46:24 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-01-02 08:46:24 -0800 |
| commit | d6242be8021d126d7d0e6a96fc0140985fd4506f (patch) | |
| tree | a976bb5ae65507f3ee30058a882a85a6f3075202 /techlibs/anlogic | |
| parent | a8f66888888e42b2cca362d208cdc780417ef33e (diff) | |
| parent | 79448f9be035c88589b4e9c0de6b2bdc5acbd4df (diff) | |
| download | yosys-d6242be8021d126d7d0e6a96fc0140985fd4506f.tar.gz yosys-d6242be8021d126d7d0e6a96fc0140985fd4506f.tar.bz2 yosys-d6242be8021d126d7d0e6a96fc0140985fd4506f.zip | |
Merge pull request #1601 from YosysHQ/eddie/synth_retime
"abc -dff" to no longer retime by default
Diffstat (limited to 'techlibs/anlogic')
| -rw-r--r-- | techlibs/anlogic/synth_anlogic.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/techlibs/anlogic/synth_anlogic.cc b/techlibs/anlogic/synth_anlogic.cc index b87fc8566..57b8a2b26 100644 --- a/techlibs/anlogic/synth_anlogic.cc +++ b/techlibs/anlogic/synth_anlogic.cc @@ -58,7 +58,7 @@ struct SynthAnlogicPass : public ScriptPass log(" do not flatten design before synthesis\n"); log("\n"); log(" -retime\n"); - log(" run 'abc' with -dff option\n"); + log(" run 'abc' with '-dff -D 1' options\n"); log("\n"); log("\n"); log("The following commands are executed by this synthesis command:\n"); @@ -164,7 +164,7 @@ struct SynthAnlogicPass : public ScriptPass run("opt -undriven -fine"); run("techmap -map +/techmap.v -map +/anlogic/arith_map.v"); if (retime || help_mode) - run("abc -dff", "(only if -retime)"); + run("abc -dff -D 1", "(only if -retime)"); } if (check_label("map_ffs")) |