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author | Clifford Wolf <clifford@clifford.at> | 2018-12-31 16:34:27 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2018-12-31 16:37:40 +0100 |
commit | 0a840dd88334c382314db3aafc2f1da2a1969df2 (patch) | |
tree | ca9d1482ef4312d8449a64cf8edfd0f18582ba14 /techlibs/anlogic | |
parent | e09e49ca5415d721b395fa5de4124cca50a6908b (diff) | |
download | yosys-0a840dd88334c382314db3aafc2f1da2a1969df2.tar.gz yosys-0a840dd88334c382314db3aafc2f1da2a1969df2.tar.bz2 yosys-0a840dd88334c382314db3aafc2f1da2a1969df2.zip |
Fix handling of (* keep *) wires in wreduce
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'techlibs/anlogic')
0 files changed, 0 insertions, 0 deletions