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| author | Lofty <dan.ravensloft@gmail.com> | 2023-01-25 09:26:58 +0000 |
|---|---|---|
| committer | Lofty <dan.ravensloft@gmail.com> | 2023-01-26 05:19:45 +0000 |
| commit | 822c7b0341064c3d0d9b142dc6ce61c66797159a (patch) | |
| tree | ed079cb45f41e4f3615138bcd84c785dab69686f /passes | |
| parent | 2e3c08adc41a8d1cc1ac383d3b048204a691672a (diff) | |
| download | yosys-822c7b0341064c3d0d9b142dc6ce61c66797159a.tar.gz yosys-822c7b0341064c3d0d9b142dc6ce61c66797159a.tar.bz2 yosys-822c7b0341064c3d0d9b142dc6ce61c66797159a.zip | |
muxcover: do not add decode muxes with x inputs
Diffstat (limited to 'passes')
| -rw-r--r-- | passes/techmap/muxcover.cc | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/passes/techmap/muxcover.cc b/passes/techmap/muxcover.cc index a90d81985..2656f30ce 100644 --- a/passes/techmap/muxcover.cc +++ b/passes/techmap/muxcover.cc @@ -179,7 +179,7 @@ struct MuxcoverWorker int prepare_decode_mux(SigBit &A, SigBit B, SigBit sel, SigBit bit) { - if (A == B || sel == State::Sx) + if (A == B || A == State::Sx || B == State::Sx || sel == State::Sx) return 0; tuple<SigBit, SigBit, SigBit> key(A, B, sel); @@ -197,9 +197,6 @@ struct MuxcoverWorker if (std::get<2>(entry)) return 0; - if (A == State::Sx || B == State::Sx) - return 0; - return cost_dmux / GetSize(std::get<1>(entry)); } |