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author | Miodrag Milanović <mmicko@gmail.com> | 2023-02-27 16:26:57 +0100 |
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committer | GitHub <noreply@github.com> | 2023-02-27 16:26:57 +0100 |
commit | 21e87f7986f354d71585087e2f15c4f0686245fd (patch) | |
tree | 71d422e4d48efdcbed40667063ad5e9c717d7afa /passes | |
parent | 842cdad575f51c7f65f13fd50d8b94920197496c (diff) | |
parent | 822c7b0341064c3d0d9b142dc6ce61c66797159a (diff) | |
download | yosys-21e87f7986f354d71585087e2f15c4f0686245fd.tar.gz yosys-21e87f7986f354d71585087e2f15c4f0686245fd.tar.bz2 yosys-21e87f7986f354d71585087e2f15c4f0686245fd.zip |
Merge pull request #3646 from YosysHQ/lofty/fix-3591
muxcover: do not add decode muxes with x inputs
Diffstat (limited to 'passes')
-rw-r--r-- | passes/techmap/muxcover.cc | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/passes/techmap/muxcover.cc b/passes/techmap/muxcover.cc index a90d81985..2656f30ce 100644 --- a/passes/techmap/muxcover.cc +++ b/passes/techmap/muxcover.cc @@ -179,7 +179,7 @@ struct MuxcoverWorker int prepare_decode_mux(SigBit &A, SigBit B, SigBit sel, SigBit bit) { - if (A == B || sel == State::Sx) + if (A == B || A == State::Sx || B == State::Sx || sel == State::Sx) return 0; tuple<SigBit, SigBit, SigBit> key(A, B, sel); @@ -197,9 +197,6 @@ struct MuxcoverWorker if (std::get<2>(entry)) return 0; - if (A == State::Sx || B == State::Sx) - return 0; - return cost_dmux / GetSize(std::get<1>(entry)); } |