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| author | Miodrag Milanovic <mmicko@gmail.com> | 2020-06-29 10:33:39 +0200 |
|---|---|---|
| committer | Miodrag Milanovic <mmicko@gmail.com> | 2020-06-29 10:33:39 +0200 |
| commit | 48b6d3272c3f6ebf1ee1aab3a8abeb5017519b82 (patch) | |
| tree | 419f022ba979f9aac07180ca5041e7fd1c32c72e /passes/sat | |
| parent | b822beb1b2e667459f4864b759b7f4d82a064354 (diff) | |
| download | yosys-48b6d3272c3f6ebf1ee1aab3a8abeb5017519b82.tar.gz yosys-48b6d3272c3f6ebf1ee1aab3a8abeb5017519b82.tar.bz2 yosys-48b6d3272c3f6ebf1ee1aab3a8abeb5017519b82.zip | |
sim - error when memrd and memwr detected
Diffstat (limited to 'passes/sat')
| -rw-r--r-- | passes/sat/sim.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc index 1ab082b09..fb496ff87 100644 --- a/passes/sat/sim.cc +++ b/passes/sat/sim.cc @@ -163,7 +163,10 @@ struct SimInstance mem_database[cell] = mem; } - + if (cell->type.in(ID($memwr),ID($memrd))) + { + log_error("$memrd and $memwr cells have to be merged to stand-alone $mem cells (execute memory_collect pass)\n"); + } if (cell->type.in(ID($assert), ID($cover), ID($assume))) { formal_database.insert(cell); } |