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| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-02 09:51:32 -0700 |
| commit | 956ecd48f71417b514c194a833a49238049e00b0 (patch) | |
| tree | 468d55265c2549c86a8e7dfaf4ec0afffbd613bb /passes/sat/assertpmux.cc | |
| parent | 2d86563bb206748d6eef498eb27f7a004f20113d (diff) | |
| download | yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.gz yosys-956ecd48f71417b514c194a833a49238049e00b0.tar.bz2 yosys-956ecd48f71417b514c194a833a49238049e00b0.zip | |
kernel: big fat patch to use more ID::*, otherwise ID(*)
Diffstat (limited to 'passes/sat/assertpmux.cc')
| -rw-r--r-- | passes/sat/assertpmux.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/passes/sat/assertpmux.cc b/passes/sat/assertpmux.cc index b4adb1ab3..5bf2296ab 100644 --- a/passes/sat/assertpmux.cc +++ b/passes/sat/assertpmux.cc @@ -52,10 +52,10 @@ struct AssertpmuxWorker for (auto cell : module->cells()) { - if (cell->type.in("$mux", "$pmux")) + if (cell->type.in(ID($mux), ID($pmux))) { - int width = cell->getParam("\\WIDTH").as_int(); - int numports = cell->type == "$mux" ? 2 : cell->getParam("\\S_WIDTH").as_int() + 1; + int width = cell->getParam(ID::WIDTH).as_int(); + int numports = cell->type == ID($mux) ? 2 : cell->getParam(ID::S_WIDTH).as_int() + 1; SigSpec sig_a = sigmap(cell->getPort(ID::A)); SigSpec sig_b = sigmap(cell->getPort(ID::B)); @@ -148,7 +148,7 @@ struct AssertpmuxWorker { log("Adding assert for $pmux cell %s.%s.\n", log_id(module), log_id(pmux)); - int swidth = pmux->getParam("\\S_WIDTH").as_int(); + int swidth = pmux->getParam(ID::S_WIDTH).as_int(); int cntbits = ceil_log2(swidth+1); SigSpec sel = pmux->getPort(ID::S); @@ -227,7 +227,7 @@ struct AssertpmuxPass : public Pass { vector<Cell*> pmux_cells; for (auto cell : module->selected_cells()) - if (cell->type == "$pmux") + if (cell->type == ID($pmux)) pmux_cells.push_back(cell); for (auto cell : pmux_cells) |