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| author | Clifford Wolf <clifford@clifford.at> | 2018-01-09 18:42:19 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-01-09 18:42:19 +0100 |
| commit | 9ac560f5d3e5847b7e475195f66b7034e91fd938 (patch) | |
| tree | 17c0a0dbc2cd845523b52d27c6c1caf215578b69 /passes/proc | |
| parent | a96c775a7301645b27486a5e663c75fca460f577 (diff) | |
| download | yosys-9ac560f5d3e5847b7e475195f66b7034e91fd938.tar.gz yosys-9ac560f5d3e5847b7e475195f66b7034e91fd938.tar.bz2 yosys-9ac560f5d3e5847b7e475195f66b7034e91fd938.zip | |
Add "dffinit -highlow" and fix synth_intel
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'passes/proc')
0 files changed, 0 insertions, 0 deletions