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| author | Clifford Wolf <clifford@clifford.at> | 2016-03-31 08:52:49 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-03-31 08:52:49 +0200 |
| commit | ec93680bd583b670e03ed98b4b1081eab8d0f3f6 (patch) | |
| tree | 13219241e72932a6a4e540f6b86e8b3c9435d660 /passes/memory/memory_share.cc | |
| parent | 1d0f0d668ade740c928c66c400476924abf62384 (diff) | |
| download | yosys-ec93680bd583b670e03ed98b4b1081eab8d0f3f6.tar.gz yosys-ec93680bd583b670e03ed98b4b1081eab8d0f3f6.tar.bz2 yosys-ec93680bd583b670e03ed98b4b1081eab8d0f3f6.zip | |
Renamed opt_share to opt_merge
Diffstat (limited to 'passes/memory/memory_share.cc')
| -rw-r--r-- | passes/memory/memory_share.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc index 3a6fd0b44..ab9edb6e7 100644 --- a/passes/memory/memory_share.cc +++ b/passes/memory/memory_share.cc @@ -746,7 +746,7 @@ struct MemorySharePass : public Pass { log("\n"); log("Note that in addition to the algorithms implemented in this pass, the $memrd\n"); log("and $memwr cells are also subject to generic resource sharing passes (and other\n"); - log("optimizations) such as opt_share.\n"); + log("optimizations) such as \"share\" and \"opt_merge\".\n"); log("\n"); } virtual void execute(std::vector<std::string> args, RTLIL::Design *design) { |