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| author | Clifford Wolf <clifford@clifford.at> | 2015-08-14 10:56:05 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-08-14 10:56:05 +0200 |
| commit | 84bf862f7c58c2b69babf043ff5032f924a3ee4d (patch) | |
| tree | c19a405bc106c2472f1aaa46c36b189db3e5223f /passes/equiv | |
| parent | 80910d13a610886f4430fbd991ada78b2e586ada (diff) | |
| download | yosys-84bf862f7c58c2b69babf043ff5032f924a3ee4d.tar.gz yosys-84bf862f7c58c2b69babf043ff5032f924a3ee4d.tar.bz2 yosys-84bf862f7c58c2b69babf043ff5032f924a3ee4d.zip | |
Spell check (by Larry Doolittle)
Diffstat (limited to 'passes/equiv')
| -rw-r--r-- | passes/equiv/equiv_make.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/passes/equiv/equiv_make.cc b/passes/equiv/equiv_make.cc index 1cc4c3a7c..c001fdbfe 100644 --- a/passes/equiv/equiv_make.cc +++ b/passes/equiv/equiv_make.cc @@ -407,7 +407,7 @@ struct EquivMakePass : public Pass { log(" Do not match cells or signals that match the names in the file.\n"); log("\n"); log(" -encfile <file>\n"); - log(" Match FSM encodings using the desiption from the file.\n"); + log(" Match FSM encodings using the description from the file.\n"); log(" See 'help fsm_recode' for details.\n"); log("\n"); log("Note: The circuit created by this command is not a miter (with something like\n"); |