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| author | Clifford Wolf <clifford@clifford.at> | 2016-11-08 18:53:36 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-11-08 18:53:36 +0100 |
| commit | 97ac77513fa29d0c23ee3453247d214f986d5e19 (patch) | |
| tree | a1586675eba0b4f0f7cd3ce821172bb0bdced9fd /passes/cmds/setundef.cc | |
| parent | 84badc97b374bb5458930217569310b45b188f44 (diff) | |
| download | yosys-97ac77513fa29d0c23ee3453247d214f986d5e19.tar.gz yosys-97ac77513fa29d0c23ee3453247d214f986d5e19.tar.bz2 yosys-97ac77513fa29d0c23ee3453247d214f986d5e19.zip | |
Bugfix in "setundef" pass
Diffstat (limited to 'passes/cmds/setundef.cc')
| -rw-r--r-- | passes/cmds/setundef.cc | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/passes/cmds/setundef.cc b/passes/cmds/setundef.cc index 26b2eb87d..e54135c8f 100644 --- a/passes/cmds/setundef.cc +++ b/passes/cmds/setundef.cc @@ -90,6 +90,8 @@ struct SetundefPass : public Pass { bool init_mode = false; SetundefWorker worker; + log_header(design, "Executing SETUNDEF pass (replace undef values with defined constants).\n"); + size_t argidx; for (argidx = 1; argidx < args.size(); argidx++) { @@ -137,8 +139,11 @@ struct SetundefPass : public Pass { SigPool undriven_signals; for (auto &it : module->wires_) - if (!it.second->port_input) - undriven_signals.add(sigmap(it.second)); + undriven_signals.add(sigmap(it.second)); + + for (auto &it : module->wires_) + if (it.second->port_input) + undriven_signals.del(sigmap(it.second)); CellTypes ct(design); for (auto &it : module->cells_) |