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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-26 00:38:44 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-26 00:38:44 +0200 |
| commit | 4755e14e7b9ba57ea21bec4c0d0b3ac6080307e4 (patch) | |
| tree | e77060cca5dcdb2bff334096fe55981208a57ab2 /kernel/rtlil.h | |
| parent | 2bec47a4045d23d46e7d300cbf80b2dce1a549a9 (diff) | |
| download | yosys-4755e14e7b9ba57ea21bec4c0d0b3ac6080307e4.tar.gz yosys-4755e14e7b9ba57ea21bec4c0d0b3ac6080307e4.tar.bz2 yosys-4755e14e7b9ba57ea21bec4c0d0b3ac6080307e4.zip | |
Added copy-constructor-like module->addCell(name, other) method
Diffstat (limited to 'kernel/rtlil.h')
| -rw-r--r-- | kernel/rtlil.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index e1e4a54bc..fbd6e719d 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -302,6 +302,7 @@ struct RTLIL::Module RTLIL::Wire *addWire(RTLIL::IdString name, int width = 1); RTLIL::Cell *addCell(RTLIL::IdString name, RTLIL::IdString type); + RTLIL::Cell *addCell(RTLIL::IdString name, const RTLIL::Cell *other); // The add* methods create a cell and return the created cell. All signals must exist in advance. |