diff options
| author | Clifford Wolf <clifford@clifford.at> | 2014-07-25 14:23:10 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-25 14:23:10 +0200 |
| commit | c762050e7fc2c733210f8cd2b147e6084af0afe1 (patch) | |
| tree | 3b3cc389fc31cd90eebd036f3d5a1b3e3acc74fa /kernel/rtlil.cc | |
| parent | 1834af5e5382de67860f5714746566123c4d6b53 (diff) | |
| download | yosys-c762050e7fc2c733210f8cd2b147e6084af0afe1.tar.gz yosys-c762050e7fc2c733210f8cd2b147e6084af0afe1.tar.bz2 yosys-c762050e7fc2c733210f8cd2b147e6084af0afe1.zip | |
Added RTLIL::SigSpec is_chunk()/as_chunk() API
Diffstat (limited to 'kernel/rtlil.cc')
| -rw-r--r-- | kernel/rtlil.cc | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 6bb395ec2..83524d796 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -2007,6 +2007,14 @@ bool RTLIL::SigSpec::is_wire() const return SIZE(chunks_) == 1 && chunks_[0].wire && chunks_[0].wire->width == width_; } +bool RTLIL::SigSpec::is_chunk() const +{ + cover("kernel.rtlil.sigspec.is_chunk"); + + pack(); + return SIZE(chunks_) == 1; +} + bool RTLIL::SigSpec::is_fully_const() const { cover("kernel.rtlil.sigspec.is_fully_const"); @@ -2121,6 +2129,15 @@ RTLIL::Wire *RTLIL::SigSpec::as_wire() const return chunks_[0].wire; } +RTLIL::SigChunk RTLIL::SigSpec::as_chunk() const +{ + cover("kernel.rtlil.sigspec.as_chunk"); + + pack(); + assert(is_chunk()); + return chunks_[0]; +} + bool RTLIL::SigSpec::match(std::string pattern) const { cover("kernel.rtlil.sigspec.match"); |