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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-13 08:59:08 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-13 12:42:15 -0800 |
| commit | b523ecf2f45f80488412781ba9a3455a71d64d62 (patch) | |
| tree | 59572f382b64d2236f4bb78baffe98255bb8f485 /kernel/rtlil.cc | |
| parent | 7cfdf4ffa7698fa40aae401c2b8b159a6e37011a (diff) | |
| download | yosys-b523ecf2f45f80488412781ba9a3455a71d64d62.tar.gz yosys-b523ecf2f45f80488412781ba9a3455a71d64d62.tar.bz2 yosys-b523ecf2f45f80488412781ba9a3455a71d64d62.zip | |
specify: system timing checks to accept min:typ:max triple
Diffstat (limited to 'kernel/rtlil.cc')
| -rw-r--r-- | kernel/rtlil.cc | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index f286d139f..5d7e61901 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -1258,8 +1258,12 @@ namespace { param_bool(ID(SRC_POL)); param_bool(ID(DST_PEN)); param_bool(ID(DST_POL)); - param(ID(T_LIMIT)); - param(ID(T_LIMIT2)); + param(ID(T_LIMIT_MIN)); + param(ID(T_LIMIT_TYP)); + param(ID(T_LIMIT_MAX)); + param(ID(T_LIMIT2_MIN)); + param(ID(T_LIMIT2_TYP)); + param(ID(T_LIMIT2_MAX)); port(ID(SRC_EN), 1); port(ID(DST_EN), 1); port(ID(SRC), param(ID(SRC_WIDTH))); |