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| author | Miodrag Milanović <mmicko@gmail.com> | 2022-03-25 14:29:21 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-25 14:29:21 +0100 |
| commit | a7e7a9f485f82f131a7b8dd8e3254b38f575eb5b (patch) | |
| tree | 153bf6dfba48cde9e800212758645f92a0a7eccd /kernel/rtlil.cc | |
| parent | afe258e6f8b9b2d29cbbe58b8604ca047e7fa847 (diff) | |
| parent | 4fd8b38d7a089dacfc5979b133593870b5d2c99b (diff) | |
| download | yosys-a7e7a9f485f82f131a7b8dd8e3254b38f575eb5b.tar.gz yosys-a7e7a9f485f82f131a7b8dd8e3254b38f575eb5b.tar.bz2 yosys-a7e7a9f485f82f131a7b8dd8e3254b38f575eb5b.zip | |
Merge pull request #3249 from YosysHQ/micko/no_startoffset
Add -no-startoffset option to write_aiger
Diffstat (limited to 'kernel/rtlil.cc')
0 files changed, 0 insertions, 0 deletions