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| author | Clifford Wolf <clifford@clifford.at> | 2016-11-01 11:30:27 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-11-01 11:30:27 +0100 |
| commit | caa2fc62ef30739291dd69b796bf050374296fd1 (patch) | |
| tree | 55d1976ae20fed7274daaa27f8a6e84f60dc9095 /frontends/vhdl2verilog | |
| parent | 1e3c2bff72fdba41af5ea3efe083a6c1236c5a56 (diff) | |
| download | yosys-caa2fc62ef30739291dd69b796bf050374296fd1.tar.gz yosys-caa2fc62ef30739291dd69b796bf050374296fd1.tar.bz2 yosys-caa2fc62ef30739291dd69b796bf050374296fd1.zip | |
Adde "write_verilog -renameprefix -v"
Diffstat (limited to 'frontends/vhdl2verilog')
0 files changed, 0 insertions, 0 deletions