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authorXiretza <xiretza@xiretza.xyz>2021-03-18 21:52:06 +0100
committerZachary Snow <zachary.j.snow@gmail.com>2021-06-14 13:56:51 -0400
commitc6681508f1a2e35d41e8fc6f1f5dec41972ef6fd (patch)
tree23210a31185df721a752cee8185dab71cdb1d3c6 /frontends/verilog
parentb57e47fad8b4ecd5438ee49c618fc8978a4bb058 (diff)
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verilog: fix leaking of type names in parser
Diffstat (limited to 'frontends/verilog')
-rw-r--r--frontends/verilog/verilog_parser.y2
1 files changed, 2 insertions, 0 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y
index 7d750ea28..1a76d0dea 100644
--- a/frontends/verilog/verilog_parser.y
+++ b/frontends/verilog/verilog_parser.y
@@ -692,6 +692,7 @@ wire_type_token:
astbuf3->is_custom_type = true;
astbuf3->children.push_back(new AstNode(AST_WIRETYPE));
astbuf3->children.back()->str = *$1;
+ delete $1;
} |
TOK_WOR {
astbuf3->is_wor = true;
@@ -1458,6 +1459,7 @@ param_type:
astbuf1->is_custom_type = true;
astbuf1->children.push_back(new AstNode(AST_WIRETYPE));
astbuf1->children.back()->str = *$1;
+ delete $1;
};
param_decl: