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author | Clifford Wolf <clifford@clifford.at> | 2016-10-14 15:24:03 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-10-14 15:24:03 +0200 |
commit | bdc316db50cd8b68ef096386a89c1b38793784e1 (patch) | |
tree | 507341053afa28df1a753ef9de33c3d096683720 /frontends/ast/genrtlil.cc | |
parent | 2733994aeba0879533cc1a871aae84497b32ff9e (diff) | |
download | yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.tar.gz yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.tar.bz2 yosys-bdc316db50cd8b68ef096386a89c1b38793784e1.zip |
Added $anyseq cell type
Diffstat (limited to 'frontends/ast/genrtlil.cc')
-rw-r--r-- | frontends/ast/genrtlil.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 229a3b596..7c661e8f3 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -762,7 +762,7 @@ void AstNode::detectSignWidthWorker(int &width_hint, bool &sign_hint, bool *foun break; case AST_FCALL: - if (str == "\\$anyconst") { + if (str == "\\$anyconst" || str == "\\$anyseq") { if (GetSize(children) == 1) { while (children[0]->simplify(true, false, false, 1, -1, false, true) == true) { } if (children[0]->type != AST_CONSTANT) @@ -1465,7 +1465,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint, bool sign_hint) } break; case AST_FCALL: { - if (str == "\\$anyconst") + if (str == "\\$anyconst" || str == "\\$anyseq") { string myid = stringf("%s$%d", str.c_str() + 1, autoidx++); int width = width_hint; |