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| author | Clifford Wolf <clifford@clifford.at> | 2016-07-21 13:34:33 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2016-07-21 13:34:33 +0200 |
| commit | d7763634b68a735443c61aa32918ee0cdd6e9250 (patch) | |
| tree | d04a1d072d727d0776c42f68668785403cc92bf5 /examples/smtbmc | |
| parent | 721f1f5ecfb6334904f6058d6d376d21b5efc438 (diff) | |
| download | yosys-d7763634b68a735443c61aa32918ee0cdd6e9250.tar.gz yosys-d7763634b68a735443c61aa32918ee0cdd6e9250.tar.bz2 yosys-d7763634b68a735443c61aa32918ee0cdd6e9250.zip | |
After reading the SV spec, using non-standard predict() instead of expect()
Diffstat (limited to 'examples/smtbmc')
| -rw-r--r-- | examples/smtbmc/demo1.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/examples/smtbmc/demo1.v b/examples/smtbmc/demo1.v index 59e497825..2e628b7da 100644 --- a/examples/smtbmc/demo1.v +++ b/examples/smtbmc/demo1.v @@ -8,7 +8,7 @@ module demo1(input clk, input addtwo, output iseven); cnt = (iseven ? cnt == 10 : cnt == 11) ? 0 : next_cnt; assert property (cnt != 15); - // initial expect ((iseven && addtwo) || cnt == 9); + // initial predict ((iseven && addtwo) || cnt == 9); endmodule module inc(input addtwo, output iseven, input [3:0] a, output [3:0] y); |