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author | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 20:10:20 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-07-10 20:10:20 -0700 |
commit | ea6ffea2cd580542cbb5cc349f5268af0700e292 (patch) | |
tree | a5b846488b3b6653ad629b097c7c035303612b39 /backends | |
parent | 7899a06ed64c55e8d804ef2970ad983e3d112013 (diff) | |
download | yosys-ea6ffea2cd580542cbb5cc349f5268af0700e292.tar.gz yosys-ea6ffea2cd580542cbb5cc349f5268af0700e292.tar.bz2 yosys-ea6ffea2cd580542cbb5cc349f5268af0700e292.zip |
Fix clk_pol for FD*_1
Diffstat (limited to 'backends')
-rw-r--r-- | backends/aiger/xaiger.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/backends/aiger/xaiger.cc b/backends/aiger/xaiger.cc index 9a448c2a0..82c28549c 100644 --- a/backends/aiger/xaiger.cc +++ b/backends/aiger/xaiger.cc @@ -311,7 +311,6 @@ struct XAigerWriter alias_map[O] = q; undriven_bits.erase(O); ff_bits.emplace_back(q); - } else { for (const auto &conn : cell->connections()) { |