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| author | Clifford Wolf <clifford@clifford.at> | 2019-05-07 15:04:36 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2019-05-07 15:04:36 +0200 |
| commit | 09467bb9a3ca01bb7bbfc6c9013ed7385e42fd96 (patch) | |
| tree | 59daccf44694ed5c7612083febe7dab1243abb1d /backends/verilog | |
| parent | a76189e7adb88a81b8c1a8910524323fe93a421c (diff) | |
| download | yosys-09467bb9a3ca01bb7bbfc6c9013ed7385e42fd96.tar.gz yosys-09467bb9a3ca01bb7bbfc6c9013ed7385e42fd96.tar.bz2 yosys-09467bb9a3ca01bb7bbfc6c9013ed7385e42fd96.zip | |
Add "synth_xilinx -arch"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'backends/verilog')
0 files changed, 0 insertions, 0 deletions