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| author | Jannis Harder <me@jix.one> | 2023-01-11 17:52:25 +0100 |
|---|---|---|
| committer | Jannis Harder <me@jix.one> | 2023-01-11 18:07:16 +0100 |
| commit | d6c7aa0e3d9e64827a8305610bedcc9a9df88a49 (patch) | |
| tree | 48815889229b82f1729f213c6aa2c6a97c2b5b3b /backends/smt2 | |
| parent | 7ddec5093f09640db0f502dfa341c25e4028563f (diff) | |
| download | yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.tar.gz yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.tar.bz2 yosys-d6c7aa0e3d9e64827a8305610bedcc9a9df88a49.zip | |
sim/formalff: Clock handling for yw cosim
Diffstat (limited to 'backends/smt2')
| -rw-r--r-- | backends/smt2/smt2.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/backends/smt2/smt2.cc b/backends/smt2/smt2.cc index 3b3585b59..1ab39a405 100644 --- a/backends/smt2/smt2.cc +++ b/backends/smt2/smt2.cc @@ -998,7 +998,7 @@ struct Smt2Worker if (contains_clock && GetSize(wire) == 1 && (clock_posedge.count(sig) || clock_negedge.count(sig))) comments.push_back(stringf("; yosys-smt2-clock %s%s%s\n", get_id(wire), clock_posedge.count(sig) ? " posedge" : "", clock_negedge.count(sig) ? " negedge" : "")); - if (contains_clock) { + if (wire->port_input && contains_clock) { for (int i = 0; i < GetSize(sig); i++) { bool is_posedge = clock_posedge.count(sig[i]); bool is_negedge = clock_negedge.count(sig[i]); |